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1

[IEEE 2013 IEEE International Symposium on Circuits and Systems (ISCAS) - Beijing (2013.5.19-2013.5.23)] 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013) - A low power BPSK demodulator for wireless implantable biomedical devices

Wilkerson, Benjamin P., Jin-Ku Kang,

Year:

2013

Language:

english

File:

PDF, 1.43 MB

english, 2013

2

[IEEE 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - Melbourne VIC, Australia (2014.6.1-2014.6.5)] 2014 IEEE International Symposium on Circuits and Systems (ISCAS) - A 8.7mW 5-Gb/s clock and data recovery circuit with 0.18-µm CMOS

An, Taek-Joon, Son, Kyung-Sub, Kim, Young-Jin, Kong, In-Seok, Kang, Jin-Ku

Year:

2014

Language:

english

File:

PDF, 1.00 MB

english, 2014

3

[IEEE 2012 IEEE International Symposium on Circuits and Systems - ISCAS 2012 - Seoul, Korea (South) (2012.05.20-2012.05.23)] 2012 IEEE International Symposium on Circuits and Systems - An audio clock regenerator with a wide dividing ratio for HDMI

Oh, Seung-Wuk, Kim, Sang-Ho, Kang, Jin-Ku

Year:

2012

Language:

english

File:

PDF, 660 KB

english, 2012

4

[IEEE 2005 IEEE International Symposium on Circuits and Systems - Kobe, Japan (23-26 May 2005)] 2005 IEEE International Symposium on Circuits and Systems - A Clock Recovery Circuit using Half-rate 4X-Oversampling PD

Hyung-Wook Jang,, Sung-Sop Lee,, Jin-Ku Kang,

Year:

2005

Language:

english

File:

PDF, 435 KB

english, 2005

5

[IEEE 2015 IEEE International Symposium on Circuits and Systems (ISCAS) - Lisbon, Portugal (2015.5.24-2015.5.27)] 2015 IEEE International Symposium on Circuits and Systems (ISCAS) - A low power 120-to-520Mb/s clock and data recovery circuit for PWM signaling scheme

Yang, Eunho, Lee, Kyongsu, Kang, Jin-Ku

Year:

2015

Language:

english

File:

PDF, 821 KB

english, 2015

6

[IEEE 2015 IEEE International Symposium on Circuits and Systems (ISCAS) - Lisbon, Portugal (2015.5.24-2015.5.27)] 2015 IEEE International Symposium on Circuits and Systems (ISCAS) - On-chip jitter tolerance measurement technique for CDR circuits

Son, Kyung-Sub, Lee, Kyongsu, Kang, Jin-Ku

Year:

2015

Language:

english

File:

PDF, 798 KB

english, 2015

7

[IEEE ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems - Sydney, NSW, Australia (6-9 May 2001)] ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196) - A CMOS clock and data recovery with two-XOR phase-frequency detector circuit

Jin-Ku Kang,, Dong-Hee Kim,

Year:

2001

Language:

english

File:

PDF, 332 KB

english, 2001

8

High-speed 8B/10B encoder design using a simplified coding table

Kim, Yong-Woo, Shin, Beomseok, Kang, Jin-Ku

Journal:

IEICE Electronics Express

Year:

2008

Language:

english

File:

PDF, 376 KB

english, 2008

9

A 200 Mb/s∼3.2 Gb/s referenceless clock and data recovery circuit with bidirectional frequency detector

Tho, Nguyen Huu, Son, Kyung-Sub, Kang, Jin-Ku

Journal:

IEICE Electronics Express

Year:

2017

Language:

english

File:

PDF, 1.61 MB

english, 2017

10

Design of a third-order delta-sigma TDC with error-feedback structure

An, Seong-Mun, Son, Kyung-Sub, An, Taek-Joon, Kang, Jin-Ku

Journal:

IEICE Electronics Express

Year:

2019

Language:

english

File:

PDF, 3.51 MB

english, 2019

11

Multifunctional gold nanoparticles as smart nanovehicles with enhanced tumour-targeting abilities for intracellular pH mapping and in vivo MR/fluorescence imaging

Yu, Kang-Kang, Li, Kun, Lu, Chun-Yan, Xie, Yong-Mei, Liu, Yan-Hong, Zhou, Qian, Bao, Jin-Ku, Yu, Xiao-Qi

Journal:

Year:

2020

File:

PDF, 1.84 MB

2020

12

2× oversampling 2.5 Gbps clock and data recovery with phase picking method

Yong-Hwan Moon, Jin-Ku Kang

Journal:

Current Applied Physics

Year:

2004

Language:

english

File:

PDF, 448 KB

english, 2004

13

Fabrication of a 2.5 Gbps × 4 channel optical micro-module for O-PCB application

Hyun-Shik Lee, Shinmo An, Young Kim, Do-Kyoon Kim, Jin-Ku Kang, Young-Wan Choi, Seung Gol Lee, Beom Hoan O, El-Hang Lee

Journal:

Microelectronic Engineering

Year:

2006

Language:

english

File:

PDF, 293 KB

english, 2006

14

A real time image processor for reproduction of gray levels in dark areas on plasma display panel (PDP)

Chang-Hoon Lee, Seung-Ho Park, Jin-Ku Kang, Choon-Woo Kim

Journal:

IEEE Transactions on Consumer Electronics

Year:

2002

Language:

english

File:

PDF, 424 KB

english, 2002

15

A CMOS high-speed data recovery circuit using the matched delay sampling technique

Jin-Ku Kang, Wentai Liu, Cavin, R.K., III

Journal:

IEEE Journal of Solid-State Circuits

Year:

1997

Language:

english

File:

PDF, 203 KB

english, 1997

16

[IEEE 2011 International SoC Design Conference (ISOCC 2011) - Jeju, Korea (South) (2011.11.17-2011.11.18)] 2011 International SoC Design Conference - Low-power non-coherent data and power recovery circuit for implantable biomedical devices

Wilkerson, Benjamin P., Kim, Tae-Ho, Kang, Jin-Ku

Year:

2011

File:

PDF, 1.66 MB

2011

17

Clock and data recovery circuit with two exclusive-OR phase frequency detector

Kim, Dong-Hee, Kang, Jin-Ku

Journal:

Electronics Letters

Year:

2000

Language:

english

File:

PDF, 377 KB

english, 2000

18

[IEEE 2012 19th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2012) - Seville, Seville, Spain (2012.12.9-2012.12.12)] 2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012) - A non-coherent BPSK receiver with dual band filtering for implantable biomedical devices

Wilkerson, Benjamin P., Kang, Jin-Ku

Year:

2012

Language:

english

File:

PDF, 696 KB

english, 2012

19

A Link Layer Design for DisplayPort Interface with State Machine Based Packet Processing

Jin, Hyun-Bae, Bae, Gi-Yeol, Yoon, Kwang-Hee, Kim, Tae-Ho, Jang, Ji-Hoon, Song, Byung-Cheol, Kang, Jin-Ku

Journal:

Journal of Signal Processing Systems

Year:

2015

Language:

english

File:

PDF, 1.16 MB

english, 2015

20

[IEEE Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits - Fukuoka, Japan (4-5 Aug. 2004)] Proceedings of 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits - A CMOS adiabatic logic for low power circuit design

Hee-sup Song,, Jin-ku Kang,

Year:

2004

Language:

english

File:

PDF, 225 KB

english, 2004

21

[IEEE Second IEEE Asia Pacific Conference on ASICs AP-ASIC 2000 - Cheju, South Korea (28-30 Aug. 2000)] Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434) - A self-timed wave pipelined adder using data align method

Byoung-Hoon Lim,, Jin-Ku Kang,

Year:

2000

Language:

english

File:

PDF, 359 KB

english, 2000

22

[IEEE 2012 International SoC Design Conference (ISOCC 2012) - Jeju Island, Korea (South) (2012.11.4-2012.11.7)] 2012 International SoC Design Conference (ISOCC) - A high-speed adaptive linear equalizer with ISI level detection using periodic training pattern

Jin-Cheol Seo,, Kim, Tae-Ho, Taek-Joon An,, Kwan Yoon,, Kang, Jin-Ku

Year:

2012

Language:

english

File:

PDF, 226 KB

english, 2012

23

[IEEE Second IEEE Asia Pacific Conference on ASICs AP-ASIC 2000 - Cheju, South Korea (28-30 Aug. 2000)] Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434) - A 1.0 Gbps clock and data recovery circuit with two-XOR phase-frequency detector

Dong-Hee Kim,, Jin-Ku Kang,

Year:

2000

Language:

english

File:

PDF, 328 KB

english, 2000

24

[IEEE 2012 IEEE 25th International SOC Conference (SOCC) - Niagara Falls, NY, USA (2012.09.12-2012.09.14)] 2012 IEEE International SOC Conference - A 1.62/2.7/5.4Gbps clock and data recovery circuit for DisplayPort 1.2

Seo, Jin-Cheol, Im, Sang-Soon, Yoon, Kwan, Oh, Seung-Wook, An, Taek-Joon, Bae, Gi-Yeol, Kang, Jin-Ku

Year:

2012

Language:

english

File:

PDF, 1.71 MB

english, 2012

25

[IEEE AP-ASIC'99: The First IEEE Asia-Pacific Conference on ASICs - Seoul, South Korea (23-25 Aug. 1999)] AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360) - A delay locked loop circuit with mixed-mode tuning

Yeo-San Song,, Jin-Ku Kang,

Year:

1999

Language:

english

File:

PDF, 351 KB

english, 1999

26

A 2.2-mW 20–135-MHz False-Lock-Free DLL for Display Interface in 0.15- $\mu\hbox{m}$ CMOS

Moon, Yong-Hwan, Kong, In-Seok, Ryu, Young-Soo, Kang, Jin-Ku

Journal:

IEEE Transactions on Circuits and Systems II: Express Briefs

Year:

2014

Language:

english

File:

PDF, 1.30 MB

english, 2014

27

[IEEE 2005 Joint 30th International Conference on Infrared and Millimeter Waves and 13th International Conference on Terahertz Electronics - Herndon, VA, USA (25-28 Sept. 2005)] 2005 Joint 30th International Conference on Infrared and Millimeter Waves and 13th International Conference on Terahertz Electronics - 3.125Gbps Reference-less Clock and Data Recovery using 4X Oversampling

Sung-Sop Lee,, Hyung-Wook Jang,, Jin-Ku Kang,

Year:

2005

Language:

english

File:

PDF, 1.86 MB

english, 2005

28

[IEEE 2010 IEEE International SOC Conference (SOCC) - Las Vegas, NV, USA (2010.09.27-2010.09.29)] 23rd IEEE International SOC Conference - A CMOS 5.4/3.24Gbps dual-rate clock and data recovery design for DisplayPort v1.2

Yoo, Jae-Wook, Kim, Tae-Ho, Kim, Dong-Kyun, Kang, Jin-Ku

Year:

2010

Language:

english

File:

PDF, 1.61 MB

english, 2010

29

[IEEE 2010 International SoC Design Conference (ISOCC 2010) - Incheon, Korea (South) (2010.11.22-2010.11.23)] 2010 International SoC Design Conference - A 720Mbps fast auxiliary channel design for DisplayPort 1.2

Jin, Hyun-Bae, Han, Jong-Seok, Kang, Jin-Ku

Year:

2010

Language:

english

File:

PDF, 812 KB

english, 2010

30

[IEEE 2012 International SoC Design Conference (ISOCC 2012) - Jeju Island, Korea (South) (2012.11.4-2012.11.7)] 2012 International SoC Design Conference (ISOCC) - A 60 to 200MHz SSCG with approximate Hershey-Kiss modulation profile in 0.11µm CMOS

Seung-Wook Oh,, Hyung-Min Park,, Joon-Hyup Seo,, Jae-Young Jang,, Gi-Yeol Bae,, Jin-Ku Kang,

Year:

2012

Language:

english

File:

PDF, 353 KB

english, 2012

31

[IEEE ESSCIRC 2011 - 37th European Solid State Circuits Conference - Helsinki, Finland (2011.09.12-2011.09.16)] 2011 Proceedings of the ESSCIRC (ESSCIRC) - A 4Gb/s adaptive FFE/DFE receiver with data-dependent jitter measurement

Kim, Tae-Ho, Han, Jong-Seok, Im, Sang-Soon, Jang, Jae-Young, Kang, Jin-Ku

Year:

2011

Language:

english

File:

PDF, 1.87 MB

english, 2011

32

[IEEE 2009 IEEE International SOC Conference (SOCC) - Belfast (2009.09.9-2009.09.11)] 2009 IEEE International SOC Conference (SOCC) - A 2.7Gbps & 1.62Gbps dual-mode clock and data recovery for DisplayPort in 0.18μm CMOS

Seungwon Lee,, Tae-Ho Kim,, Jae-Wook Yoo,, Jin-Ku Kang,

Year:

2009

Language:

english

File:

PDF, 477 KB

english, 2009

33

[IEEE 2013 International Soc Design Conference (ISOCC) - Busan, South Korea (2013.11.17-2013.11.19)] 2013 International SoC Design Conference (ISOCC) - A 5-Gb/s 11.4mW half-rate CDR in 0.18μm CMOS

An, Taek-Joon, Kang, Jin-Ku

Year:

2013

Language:

english

File:

PDF, 755 KB

english, 2013

34

[IEEE 2010 IEEE International SOC Conference (SOCC) - Las Vegas, NV, USA (2010.09.27-2010.09.29)] 23rd IEEE International SOC Conference - A 1.7Gbps DLL-based Clock Data Recovery in 0.35µm CMOS

Kim, Sang-Ho, Park, Hyung-Min, Kim, Tae-Ho, Kang, Jin-Ku, Kim, Jin-Ho, Lee, Jae-Youl, Choi, Yoon-Kyung, Lee, Myunghee

Year:

2010

Language:

english

File:

PDF, 1.09 MB

english, 2010

35

[IEEE 2009 International SoC Design Conference (ISOCC) - Busan, Korea (South) (2009.11.22-2009.11.24)] 2009 International SoC Design Conference (ISOCC) - A 5.4Gbps/3.24Gbps dual-rate CDR with Strengthened up/down pulse ratio

Yoo, Jae-Wook, Kim, Dong-Kyun, Kang, Jin-Ku

Year:

2009

Language:

english

File:

PDF, 725 KB

english, 2009

36

[IEEE 2013 IEEE International Conference on Multimedia and Expo Workshops (ICMEW) - San Jose, CA, USA (2013.07.15-2013.07.19)] 2013 IEEE International Conference on Multimedia and Expo Workshops (ICMEW) - Three-dimensional perception improvement using sharpness adjustment and hardware implementation

Hak Gu Kim,, Jin-ku Kang,, Byung Cheol Song,

Year:

2013

Language:

english

File:

PDF, 697 KB

english, 2013

37

[IEEE APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) - Macao, China (2008.11.30-2008.12.3)] APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems - An 8B/10B encoder with a modified coding table

Yong-woo Kim,, Jin-ku Kang,

Year:

2008

Language:

english

File:

PDF, 1008 KB

english, 2008

38

Video denoising using overlapped motion compensation and advanced collaborative filtering

Lee, Tae Hwan, Kang, Jin-Ku, Song, Byung Cheol

Journal:

Journal of Electronic Imaging

Year:

2012

Language:

english

File:

PDF, 1.88 MB

english, 2012

39

[IEEE 2008 International SoC Design Conference (ISOCC) - Busan, Korea (South) (2008.11.24-2008.11.25)] 2008 International SoC Design Conference - Spread spectrum clock generator for DisplayPort

Hyun-Chul Lee,, Suk-Won Lee,, Jin-Ku Kang,

Year:

2008

Language:

english

File:

PDF, 198 KB

english, 2008

40

[IEEE 2008 International SoC Design Conference (ISOCC) - Busan, Korea (South) (2008.11.24-2008.11.25)] 2008 International SoC Design Conference - A 2.7Gbps & 1.62Gbps dual-mode clock and data recovery for DisplayPort

Seungwon Lee,, Jae-Wook Yoo,, Jin-Ku Kang,

Year:

2008

Language:

english

File:

PDF, 377 KB

english, 2008

41

[IEEE 2008 International SoC Design Conference (ISOCC) - Busan, Korea (South) (2008.11.24-2008.11.25)] 2008 International SoC Design Conference - A design of DisplayPort link layer

Yong-woo Kim,, Seong-bok Cha,, Jin-ku Kang,

Year:

2008

Language:

english

File:

PDF, 374 KB

english, 2008

42

An ultra-low power BPSK demodulator with dual band filtering for implantable biomedical devices

Wilkerson, Benjamin P., Seo, Joon-Hyup, Seo, Jin-Cheol, Kang, Jin-Ku

Journal:

IEICE Electronics Express

Year:

2013

Language:

english

File:

PDF, 1.03 MB

english, 2013

43

A low-power CDR using dynamic CML latches and V/I converter merged with XOR for half-rate linear phase detection

Ahn, Taek-Joon, Son, Kyung-Sub, Ahn, Yong-Sung, Kang, Jin-Ku

Journal:

IEICE Electronics Express

Year:

2014

Language:

english

File:

PDF, 2.41 MB

english, 2014

44

A low jitter clock and data recovery with a single edge sensing Bang-Bang PD

Ahn, Taek-Joon, Im, Sang-Soon, Ahn, Yong-Sung, Kang, Jin-Ku

Journal:

IEICE Electronics Express

Year:

2014

Language:

english

File:

PDF, 1.60 MB

english, 2014

45

On-chip jitter tolerance measurement technique with independent jitter frequency modulation from VCO in CDR

Son, Kyung-Sub, Kang, Jin-Ku

Journal:

IEICE Electronics Express

Year:

2015

Language:

english

File:

PDF, 3.08 MB

english, 2015

46

Precise time-difference repetition for TDC with delay mismatch cancelling scheme

Kong, Inseok, Son, Kyung-Sub, Lee, Kyongsu, Kang, Jin-Ku

Journal:

IEICE Electronics Express

Year:

2015

Language:

english

File:

PDF, 1.96 MB

english, 2015

47

A DLL-based Clock Data Recovery with a modified input format

Kim, Tae-Ho, Kim, Sang-Ho, Kang, Jin-Ku

Journal:

IEICE Electronics Express

Year:

2010

Language:

english

File:

PDF, 370 KB

english, 2010

48

A 10Gb/s adaptive equalizer with ISI level measurement

Kim, Tae-Ho, Seo, Jin-Cheol, Ahn, Yong-Sung, Kang, Jin-Ku

Journal:

IEICE Electronics Express

Year:

2012

Language:

english

File:

PDF, 563 KB

english, 2012

49

A 1.1 mW/Gb/s 10 Gbps half-rate clock-embedded transceiver for high-speed links in 65 nm CMOS

Lee, Kyongsu, Kim, Youngjin, Son, Kyungsub, Lee, Sangmin, Kang, Jin-Ku

Journal:

IEICE Electronics Express

Year:

2014

Language:

english

File:

PDF, 3.09 MB

english, 2014

50

Avoiding noise frequency interference with binary phase pulse driving and CDS for capacitive TSP controller

Ahn, Yong-Sung, Ahn, Taek-Joon, Lee, Kyongsu, Kang, Jin-Ku

Journal:

IEICE Electronics Express

Year:

2014

Language:

english

File:

PDF, 2.53 MB

english, 2014

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